Huawei Brings Huge Inference Boost With Its Next-Gen Ascend 960 Chips In 2027, While 2028’s Ascend 970 Pushes Memory To 288 GB & Ascend 980 Pushes Memory To 384 GB In 2029

Huawei has released its next-gen Ascend chip and SuperPod roadmap, which comprises Ascend 960DT/PR, Ascend 970, and Ascend 980 accelerators.

Huawei Pushes Its AI Accelerator Roadmap Ahead With Next-Gen Ascend Chips Arriving Earlier Than Anticipated

At Huawei Connect 2026, the company disclosed its latest Ascend and Atlas roadmaps, which feature various next-generation chips and technologies. The main point is that Huawei is going to push its AI infrastructure roadmap ahead to address the growing industry demands, and there are four upcoming chips to look at.

The Ascend Chip Portfolio

Starting with the chips, Ascend will first introduce its next-gen Ascend 960DT as a successor to its Ascend 950 chip. This chip will utilize a new SIMD/SIMT architecture which will support a range of data formats such as FP32, HF32, FP16, BF16, FP8, MXFP8, HiF8, MXFP4 and HiF4. The "H" formats take both precision and dynamic range into account and are capable of replacing two formats of standard floating point data formats with only one format.

The chip will feature up to 2 PFLOPs of FP8 and 4 PFLOPs of FP4 compute. In terms of memory, the chip will feature 288 GB of HBM operating at 9.6 TB/s, a 2.4x increase over the Ascend 950 series, while the interconnect bandwidth will be 2.2 TB/s across the chip.

Following the launch of the Ascend 960DT, Huawei will also introduce the Ascend 960PR chip in the third quarter of 2027. This chip will feature much faster inference capabilities, with the total FP4 compute being boosted to 8 PFLOPs. The chip will feature a leaner 192 GB of HBM & 2.4 TB/s bandwidth. The interconnect bandwidth will be retained at 2.2 TB/s.

Ascend 970 For 2028

Looking beyond 2027, Huawei is planning two more chips, the Ascend 970 and Ascend 980. The Ascend 970 will be another major architectural uplift with up to 3.6 PFLOPs of FP8 and 14 PFLOPs of FP4 compute. The chip will feature 288 GB of HBM memory, but it will operate at 14.4 TB/s. This points to a new HBM standard than HBM3/E. The interconnect bandwidth will also see a 2x boost to 4.4 TB/s.

Ascend 980 For 2029

In 2028, Huawei is proposing that its Ascend 980 chip will continue to build upon the foundation of its predecessors, boosting the compute capabilities to 7.2 PFLOPs in FP8 and 28 PFLOPs in FP4. The chip will feature 384 GB of HBM memory operating at 38.4 TB/s of bandwidth, and 8 TB/s of interconnect bandwidth. Huawei does mention that these are preliminary specs for the 980 chip, which can change close to launch.

Ascend 960 SuperPod Deploys NPO & Brings Double The Performance

The Huawei Atlas 960E SuperPoD has also been announced as the industry's first solution with NPO (Near-Package Optics), featuring a fast 7.2 Tbps transmission speed. The solution is aiming for a Q3 2027 release and will be liquid-cooled. The system will offer 8 Exaflops of FP8 and 16 Exaflops of FP4 compute performance.

First SuperPoD using NPO (near-package optics) via Huawei’s Hi-ONE optical engine (7.2 Tbps per engine)

4,096 NPUs, unified memory addressing

8 EFLOPS FP8 / 16 EFLOPS FP4

About 1 PB HBM in some official briefings; your paste also cites a 256 TB unified memory pool depending on what is being counted (on-package HBM vs. the larger SuperPoD memory fabric)

~5,500 Hi-ONE modules replacing tens of thousands of 800G pluggables, >550 kW saved, availability claimed at 99.8%

vs Atlas 950: about 2.3× training and 2.5× inference throughput on 10T-parameter examples, plus ~70% lower inference latency

Multi-SuperPoD clusters via RoCE or Lingqu: up to 512,000 accelerators, or 1 million on multi-track topology

This system will utilize the Hi-ONE optical engine and feature a total of 4096 NPUs with unified memory addressing. The system will be interconnected with the latest UnifiedBus, which offers 2us of RTT in an all-domain D2D environment. The leveraging of 5500 Hi-ONE NPU modules will reduce power consumption by over 550kW. The entire system will feature a massive 256 TB unified memory pool.

Compared to the existing Atlas 950 SuperPods, the 960E will feature up to 2.3x throughput in AI training workloads (10T-parameter model with 16K sequence length), and up to 2.5x throughput in AI inferencing (10T-parameter model with 256 K context length). The system also achieves 70% lower latency in inference workloads.

Additionally, Huawei will also enable multiple Atlas 960E SuperPods to link together using RoCE or Lingqu, creating super clusters with up to 512,000 accelerators, & million on multi-track topology clusters.

Huawei is also tackling the growing KV cache requirements with its OceanStor M900 AI memory and storage solution, which uses the Lingqu network to build a "one-hop direct" PB-level global KV Cache multi-level caching solution. OceanStor M900 expands the KV Cache of the SuperPod from VRAM and memory to SSD. A single cluster can provide 64PB of capacity, & the available KV Cache capacity of a single NPU is increased from GBs to TBs, allowing more context to be saved, shared, and reused, significantly improving the KV Cache hit rate.

OceanStor M900 combines CPU, network, and the disk controller, enabling SuperPods to achieve one-hop direct access from the NPU to the SSD, avoiding protocol conversion & CPU forwarding. Access latency is reduced from milliseconds to 60μs, a 90% reduction. A single cluster can provide 40TB/s aggregated access bandwidth, which the company claims is 1.5 times higher than industry standards.

All of this shows that Huawei is no longer waiting on a single flagship chip: it pulled the Ascend 960 family forward and locked in a yearly path through 970 and 980. The bigger story is the Atlas 960 SuperPoD, which uses NPO optics and thousands of NPUs to turn scale, memory, and interconnect into the real performance gain. If the roadmap holds, Huawei’s bet is clear, win the AI race with faster systems and deeper clusters, not just a faster die.